Rapidus Provides Chip Packaging Companies to Plans for $32 Billion 2nm Fab

To say that the worldwide foundry market is booming proper now can be an understatement. Demand for modern course of applied sciences pushed by AI and HPC purposes is unprecedented, and with Intel becoming a member of the contract chipmaking sport, this market phase is as soon as once more changing into somewhat aggressive as nicely. But, that is precisely the market phase that Rapidus, a foundry startup backed by the Japanese authorities and several other main Japanese firms, goes to enter in 2027, when its first fab comes on-line, only a few years from now.

In a recent replace on the standing of citing the corporate’s first modern fab, Rapidus has revealed that they’re aspiring to get in to the chip packaging sport as nicely. As soon as full, the ¥5 trillion ($32 billion) fab shall be providing each chip lithography on a 2nm node, in addition to packaging providers for chips produced throughout the facility – a notable distinction in an trade the place, even when packaging is not outsourced solely (OSAT), it is nonetheless usually dealt with at devoted amenities.

In the end, whereas the corporate needs to serve the identical shoppers as TSMC, Samsung, and Intel Foundry, the agency plans to do issues virtually utterly in a different way than its opponents in a bid to hurry up chipmaking from ending design to getting a working chip out of the fab.

“We’re very happy with being Japanese,” mentioned Henri Richard, normal supervisor and president of Rapidus’s subsidiary within the U.S. “[…] I do know that some folks could also be this considering [that] Japan is thought for high quality, consideration to element, however not essentially for velocity, or flexibility. However I’ll let you know that Atsuyoshi Koike (the top of Rapidus) is a really particular government. That’s, he has all the standard of Japan, with a whole lot of American considering. So he’s fairly a novel man, and definitely terribly targeted on creating an organization that shall be extraordinarily versatile and very fast on its ft.”

2nm Solely, At First

Maybe essentially the most vital distinction between Rapidus and conventional foundries is that the corporate will provide solely modern manufacturing applied sciences to its shoppers: 2 nm in 2027 (part 1) after which 1.4 nm sooner or later (part 2). It is a stark distinction with different contract fabs, together with Intel, which have a tendency to supply their clients a full vary of fabrication processes to land extra shoppers and produce extra chips. Apparently, Rapidus hopes that that there shall be sufficient Japanese and American chip builders which are inclined to make use of its 2 nm fabrication course of to provide their designs. With that mentioned, the variety of chip designers which are utilizing essentially the most superior manufacturing node at any given time is comparatively small – restricted to massive companies who want first-mover benefit and have the margins to justify taking the danger – so it stays to be seen whether or not Rapidus’s enterprise mannequin turns into profitable. The corporate believes it can, for the reason that market of chips made on superior nodes is rising quickly.

“Till just lately IDC was giving a an estimation of the 2nm and under market as about $80 billion and I feel we’re going to see quickly a revision of the potential to $150 billion,” mentioned Richard. “[…] TSMC is the 800 pound gorilla within the area. Samsung is there and Intel goes to enter that area. However the market progress is so vital and the demand is so excessive, that it doesn’t take a whole lot of market share for Rapidus to achieve success. One of many issues that provides me nice consolation is that once I discuss to our EDA companions, once I discuss to our potential shoppers, it’s apparent that the complete trade is on the lookout for different provide from a totally unbiased foundry. There’s a place for Samsung on this trade, there’s a place for Intel on this trade, the trade is at the moment owned by TSMC. However one other completely unbiased foundry is greater than welcome by all the ecosystem companions and by the purchasers. So, I really feel actually, actually good about Rapidus’s positioning.”

Talking of superior course of applied sciences, it’s notable that Rapidus doesn’t plan to make use of ASML’s Excessive-NA Twinscan EXE lithography scanners for two nm manufacturing. As an alternative, Rapidus is sticking to ASML’s confirmed Low-NA scanners, which is able to cut back prices of Rapidus’s fab, although it can entail utilization of EUV double patterning, which brings up prices and elongates the manufacturing cycle in different methods. Even with these trade-offs, SemiAnalysis analysts believe that given the price of Excessive-NA EUV litho instruments and halved imaging area, Low-NA double patterning could possibly be extra economically viable.

“We predict we’re completely comfy with the present [Low-NA EUV] answer for 2nm, however we would think about a unique answer at 1.4 nm,” mentioned Richard.

For now, solely Intel plans to make use of Excessive-NA instruments to make chips on its 14A (1.4 nm-class) fabrication course of typically in the midst of the last decade. TSMC and Samsung Foundry look to be extra cautious, so Rapidus is just not alone with its perspective in direction of Excessive-NA EUV instruments.

Superior Packaging at a Main-Edge Fab

Along with superior course of applied sciences, high-end chip designers (reminiscent of these used for AI and HPC purposes) additionally want superior packaging applied sciences (e.g., for HBM integration) and Rapidus is able to provide them as nicely. What units the corporate other than its trade friends is that it plans to construct and bundle chips in the identical fab.

“We intend to have the backend functionality in Hokkaido [semiconductor fab] as a differentiator,” Richard mentioned. “We get pleasure from ranging from scratch and be capable to construct most likely the primary totally built-in entrance finish again finish semiconductor fab within the trade, I feel. Others will retrofit and modify their current capability, however we’ve got a clear sheet of paper and a part of the key sauce that Koike son is bringing to Rapidus are some very attention-grabbing concepts on tips on how to combine each entrance finish and again finish amongst others.”

Intel, Samsung, and TSMC have separate amenities for chip manufacturing and packaging, as even essentially the most refined packaging strategies involving silicon interposers (that are primarily massive chips) do not match the complexity of recent processors. The instruments which are used to construct silicon interposers and tools used to make full logic chips are vastly totally different, so putting in them into the identical cleanroom usually makes little sense as they don’t complement one another very nicely.

Alternatively, transporting wafers from one website to a different is a time consuming and dangerous endeavor, so integrating all the pieces into one campus might make sense because it enormously simplifies provide chain.

“We’re going to re reinvent the way in which, chip design, entrance finish and the again finish are working collectively towards the completion of a undertaking,” Richard mentioned. […] The entire concept is we are able to do it quick, with top quality, excessive yield, and with a really quick cycle time.”