New MIM Capacitor and Bottom PDN Detailed
TSMC has revealed some further particulars about its upcoming N2 and N2P course of know-how at its European Expertise Symposium 2023. Each manufacturing nodes are being developed with high-performance computing (HPC) in thoughts, so, they function a lot of enhancements designed particularly to enhance efficiency. In the meantime, given the performance-efficiency focus that the majority chips intention to enhance upon, low-power functions may even make the most of TSMC’s N2 nodes as they are going to naturally enhance performance-per-watt in comparison with predecessors.
“N2 is a superb match for the power environment friendly computing paradigm that we’re in right this moment,” stated Yujun Li, TSMC’s director of enterprise growth who’s in command of the foundry’s Excessive Efficiency Computing Enterprise Division, on the firm’s European Expertise Symposium 2023. “The velocity and energy benefits of N2 over N3 over your complete voltage provide ranges as proven may be very constant, making it appropriate for each low-power and high-performance functions on the similar time.”
TSMC’s N2 manufacturing node — the foundry’s first manufacturing nodes to make use of nanosheet gate-all-around (GAAFET) transistors — guarantees to extend transistor efficiency by 10-15% on the similar energy and complexity, or decrease energy utilization by 25-30% on the similar clock velocity and transistor depend. Energy supply is without doubt one of the nook stones with regards to enhancing transistor efficiency and TSMC’s N2 and N2P manufacturing processes introduce a number of interconnects-related improvements to squeeze some further efficiency. Moreover, N2P brings in bottom energy rail to optimize energy supply and die space.
Preventing Resistance
One of many improvements that N2 brings to the desk is super-high-performance metal-insulator-metal (SHPMIM) capacitor to reinforce energy provide stability and facilitate on-chip decoupling. TSMC says that the brand new SHPMIM capacitor affords over 2X increased capability density in comparison with its super-high-density metal-insulator-metal (SHDMIM) capacitor launched a number of years in the past for HPC (which increased capacitance by 4X when in comparison with previous-generation HDMIM). The brand new SHPMIM additionally reduces Rs sheet resistance (Ohm/sq.) by 50% in comparison with SHDMIM in addition to Rc by way of resistance by 50% in comparison with SHDMIM.
One more strategy to cut back resistance within the energy supply community has been to rearchitect the redistribution layer (RDL). Ranging from its N2 course of know-how, TSMC will use a copper RDL as a substitute of right this moment’s aluminum RDL. A copper RDL will present the same RDL pitch, however will cut back sheet resistance by 30% in addition to lower down by way of resistance by 60%.
Each SHPMIM and Cu RDL are elements of TSMC’s N2 know-how that’s projected for use for prime quantity manufacturing (HVM) within the second half 2025 (presumably very late in 2025).
Decoupling Energy and I/O Wiring
Using a bottom energy supply community (PDN) is a yet one more main enchancment that can be featured by N2P. Normal benefits of bottom energy rail are well-known: by separating I/O and energy wiring by shifting energy rails to the again, it’s doable to make energy wires thicker and due to this fact cut back by way of resistances within the back-end-of-line (BEOL), which guarantees to enhance efficiency and lower down energy consumption. Additionally, decoupling I/O and energy wires permits to shrink logic space, which suggests decrease prices.
At its Expertise Symposium 2023 the corporate revealed that bottom PDN of its N2P will allow 10% to 12% increased efficiency by lowering IR droop and enhancing signaling, in addition to lowering the logic space by 10% to fifteen%. Now, in fact, such benefits can be extra apparent in high-performance CPUs and GPUs which have dense energy supply community and due to this fact shifting it to the again makes an excellent sense for them.
Bottom PDN is part of TSMC’s N2P fabrication know-how that may enter HVM in late 2026 or early 2027.
